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title: "Proceedings - International Symposium on Computer"
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# Proceedings - International Symposium on Computer Architecture/Proceedings 2025: all accepted papers

135 papers · page 1 of 2 · the most cited first · [← Proceedings - International Symposium on Computer Architecture/Proceedings 2025](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/)

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1. **[Insights into DeepSeek-V3: Scaling Challenges and Reflections on Hardware for AI Architectures](https://md.research.elamur.ai/free/en/papers/zhao-2025-insights-deepseek-v3-scaling/)**Chenggang Zhao, Chengqi Deng, Chong Ruan et al.*41 citations · our summary*
2. **[H 2 -LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference ↗](https://doi.org/10.1145/3695053.3731008)**Cong Li, Yihan Yin, Xintong Wu et al.*34 citations*
3. **[WSC-LLM: Efficient LLM Service and Architecture Co-exploration for Wafer-scale Chips ↗](https://doi.org/10.1145/3695053.3731101)**Zheng Ming Xu, Dehao Kong, Jiaxin Liu et al.*22 citations*
4. **[LIA: A Single-GPU LLM Inference Acceleration with Cooperative AMX-Enabled CPU-GPU Computation and CXL Offloading ↗](https://doi.org/10.1145/3695053.3731092)**Hyungyo Kim, Nachuan Wang, Qirong Xia et al.*20 citations*
5. **[LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference ↗](https://doi.org/10.1145/3695053.3731057)**Zhiwen Mo, Lei Wang, Jianyu Wei et al.*18 citations*
6. **[Neo: Towards Efficient Fully Homomorphic Encryption Acceleration using Tensor Core ↗](https://doi.org/10.1145/3695053.3731408)**Dian Jiao, Xianglong Deng, Zhiwei Wang et al.*18 citations*
7. **[Oaken: Fast and Efficient LLM Serving with Online-Offline Hybrid KV Cache Quantization ↗](https://doi.org/10.1145/3695053.3731019)**Minsu Kim, Seongmin Hong, Ryeowook Ko et al.*17 citations*
8. **[PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer ↗](https://doi.org/10.1145/3695053.3731045)**Qize Yang, Taiquan Wei, Sihan Guan et al.*16 citations*
9. **[RAGO: Systematic Performance Optimization for Retrieval-Augmented Generation Serving ↗](https://doi.org/10.1145/3695053.3731093)**Wenqi Jiang, Suvinay Subramanian, Cat Graves et al.*16 citations*
10. **[WindServe: Efficient Phase-Disaggregated LLM Serving with Stream-based Dynamic Scheduling ↗](https://doi.org/10.1145/3695053.3730999)**Jingqi Feng, Yukai Huang, Rui Zhang et al.*16 citations*
11. **[AiF: Accelerating On-Device LLM Inference Using In-Flash Processing ↗](https://doi.org/10.1145/3695053.3731073)**Jaeyong Lee, Hyeunjoo Kim, Sanghun Oh et al.*14 citations*
12. **[Meta's Second Generation AI Chip: Model-Chip Co-Design and Productionization Experiences ↗](https://doi.org/10.1145/3695053.3731409)**Joel Coburn, Chunqiang Tang, Sameer Abu Asal et al.*14 citations*
13. **[REIS: A High-Performance and Energy-Efficient Retrieval System with In-Storage Processing ↗](https://doi.org/10.1145/3695053.3731116)**Kangqi Chen, Rakesh Nadig, Manos Frouzakis et al.*14 citations*
14. **[MoPAC: Efficiently Mitigating Rowhammer with Probabilistic Activation Counting ↗](https://doi.org/10.1145/3695053.3730997)**Suhas Vittal, Salman Qazi, Poulami Das et al.*13 citations*
15. **[Ecco: Improving Memory Bandwidth and Capacity for LLMs via Entropy-Aware Cache Compression ↗](https://doi.org/10.1145/3695053.3731024)**Feng Cheng, Cong Guo, Chiyue Wei et al.*12 citations*
16. **[Need for zkSpeed: Accelerating HyperPlonk for Zero-Knowledge Proofs ↗](https://doi.org/10.1145/3695053.3731021)**Alhad Daftardar, Jianqiao Mo, Joey Ah-kiow et al.*12 citations*
17. **[Chimera: Communication Fusion for Hybrid Parallelism in Large Language Models ↗](https://doi.org/10.1145/3695053.3731025)**Le Qin, Junwei Cui, Weilin Cai et al.*11 citations*
18. **[Cramming a Data Center into One Cabinet, a Co-Exploration of Computing and Hardware Architecture of Waferscale Chip ↗](https://doi.org/10.1145/3695053.3731016)**Xingmao Yu, Dingcheng Jiang, Jinyi Deng et al.*11 citations*
19. **[Fair-CO2: Fair Attribution for Cloud Carbon Emissions ↗](https://doi.org/10.1145/3695053.3731023)**Leo Han, Jash Kakadia, Benjamin C. Lee et al.*11 citations*
20. **[Hybe: GPU-NPU Hybrid System for Efficient LLM Inference with Million-Token Context Window ↗](https://doi.org/10.1145/3695053.3731051)**Seungjae Moon, Junseo Cha, Hyunjun Park et al.*11 citations*
21. **[ANSMET: Approximate Nearest Neighbor Search with Near-Memory Processing and Hybrid Early Termination ↗](https://doi.org/10.1145/3695053.3731013)**Yiwei Li, Yuxin Jin, Boyu Tian et al.*10 citations*
22. **[DReX: Accurate and Scalable Dense Retrieval Acceleration via Algorithmic-Hardware Codesign ↗](https://doi.org/10.1145/3695053.3731079)**Derrick Quinn, E. Ezgi Yücel, Martin Prammer et al.*10 citations*
23. **[Dadu-Corki: Algorithm-Architecture Co-Design for Embodied AI-powered Robotic Manipulation ↗](https://doi.org/10.1145/3695053.3731099)**Yiyang Huang, Yuhui Hao, Yu Bo et al.*10 citations*
24. **[HeterRAG: Heterogeneous Processing-in-Memory Acceleration for Retrieval-augmented Generation ↗](https://doi.org/10.1145/3695053.3731089)**Chaoqiang Liu, Haifeng Liu, Dan Chen et al.*10 citations*
25. **[MicroScopiQ: Accelerating Foundational Models through Outlier-Aware Microscaling Quantization ↗](https://doi.org/10.1145/3695053.3730989)**Akshat Ramachandran, Souvik Kundu, Tushar Krishna*10 citations*
26. **[ArtMem: Adaptive Migration in Reinforcement Learning-Enabled Tiered Memory ↗](https://doi.org/10.1145/3695053.3731001)**Xinyue Yi, Hongchao Du, Yu Wang et al.*9 citations*
27. **[DCPerf: An Open-Source, Battle-Tested Performance Benchmark Suite for Datacenter Workloads ↗](https://doi.org/10.1145/3695053.3731411)**Wei Su, Abhishek Dhanotia, Carlos Torres et al.*9 citations*
28. **[DREAM: Enabling Low-Overhead Rowhammer Mitigation via Directed Refresh Management ↗](https://doi.org/10.1145/3695053.3731117)**Hritvik Taneja, Moinuddin K. Qureshi*9 citations*
29. **[Forest: Access-aware GPU UVM Management ↗](https://doi.org/10.1145/3695053.3731047)**Mao Lin, Yuan Feng, Guilherme Cox et al.*9 citations*
30. **[In-Storage Acceleration of Retrieval Augmented Generation as a Service ↗](https://doi.org/10.1145/3695053.3731032)**Rohan Mahapatra, Harsha Santhanam, Christopher Priebe et al.*9 citations*
31. **[Phi: Leveraging Pattern-based Hierarchical Sparsity for High-Efficiency Spiking Neural Networks ↗](https://doi.org/10.1145/3695053.3731035)**Chiyue Wei, Bowen Duan, Cong Guo et al.*9 citations*
32. **[Reconfigurable Stream Network Architecture ↗](https://doi.org/10.1145/3695053.3731088)**C.C. Wang, Xiaofan Zhang, Jason Cong et al.*9 citations*
33. **[Scaling Llama 3 Training with Efficient Parallelism Strategies ↗](https://doi.org/10.1145/3695053.3731410)**Weiwei Chu, Xinfeng Xie, Jiecao Yu et al.*9 citations*
34. **[SpecEE: Accelerating Large Language Model Inference with Speculative Early Exiting ↗](https://doi.org/10.1145/3695053.3730996)**Jiaming Xu, Jiayi Pan, Yongkang Zhou et al.*9 citations*
35. **[FAST:An FHE Accelerator for Scalable-parallelism with Tunable-bit ↗](https://doi.org/10.1145/3695053.3731407)**Shengyu Fan, Xianglong Deng, Liang Kong et al.*8 citations*
36. **[FRED: A Wafer-scale Fabric for 3D Parallel DNN Training ↗](https://doi.org/10.1145/3695053.3731055)**Saeed Rashidi, William Won, Sudarshan Srinivasan et al.*8 citations*
37. **[Heliostat: Harnessing Ray Tracing Accelerators for Page Table Walks ↗](https://doi.org/10.1145/3695053.3731011)**Yuan Feng, Yuke Li, Jiwon Lee et al.*8 citations*
38. **[Transitive Array: An Efficient GEMM Accelerator with Result Reuse ↗](https://doi.org/10.1145/3695053.3731043)**Cong Guo, Chiyue Wei, Jiaming Tang et al.*8 citations*
39. **[Variational Quantum Algorithms in the era of Early Fault Tolerance ↗](https://doi.org/10.1145/3695053.3731112)**Siddharth Dangwal, Suhas Vittal, Lennart Maximilian Seifert et al.*8 citations*
40. **[RTSpMSpM: Harnessing Ray Tracing for Efficient Sparse Matrix Computations ↗](https://doi.org/10.1145/3695053.3731072)**Hongrui Zhang, Yunan Zhang, Hung‐Wei Tseng*7 citations*
41. **[Resource Analysis of Low-Overhead Transversal Architectures for Reconfigurable Atom Arrays ↗](https://doi.org/10.1145/3695053.3731039)**Hengyun Zhou, Casey Duckering, Chen Zhao et al.*7 citations*
42. **[UPP: Universal Predicate Pushdown to Smart Storage ↗](https://doi.org/10.1145/3695053.3731005)**Ipoom Jeong, Jinghan Huang, Chuxuan Hu et al.*7 citations*
43. **[WarmCache: Exploiting STT-RAM Cache for Low-Power Intermittent Systems ↗](https://doi.org/10.1145/3695053.3731049)**Noureldin Hassan, Byounguk Min, Changhee Jung et al.*7 citations*
44. **[Zettafly: A Network Topology with Flexible Non-blocking Regions for Large-scale AI and HPC Systems ↗](https://doi.org/10.1145/3695053.3731098)**Dezun Dong, Ziyu Wang, Fei Lei*7 citations*
45. **[Light-weight Cache Replacement for Instruction Heavy Workloads ↗](https://doi.org/10.1145/3695053.3730993)**Saba Mostofi, Setu Gupta, Ahmad Hassani et al.*6 citations*
46. **[Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy ↗](https://doi.org/10.1145/3695053.3731003)**Yu Feng, Weikai Lin, Yuge Cheng et al.*6 citations*
47. **[OptiPIM: Optimizing Processing-in-Memory Acceleration Using Integer Linear Programming ↗](https://doi.org/10.1145/3695053.3731041)**Jiantao Liu, Minxuan Zhou, Yue Pan et al.*6 citations*
48. **[Process Only Where You Look: Hardware and Algorithm Co-optimization for Efficient Gaze-Tracked Foveated Rendering in Virtual Reality ↗](https://doi.org/10.1145/3695053.3731110)**Haiyu Wang, Wenxuan Liu, Kenneth Chen et al.*6 citations*
49. **[PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips ↗](https://doi.org/10.1145/3695053.3731030)**İsmail Emir Yüksel, Akash Sood, Ataberk Olgun et al.*6 citations*
50. **[When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer Mitigations ↗](https://doi.org/10.1145/3695053.3731007)**Jeonghyun Woo, Joy Qu, Gururaj Saileshwar et al.*6 citations*
51. **[AMALI: An Analytical Model for Accurately Modeling LLM Inference on Modern GPUs ↗](https://doi.org/10.1145/3695053.3731064)**Shiheng Cao, Junmin Wu, Junshi Chen et al.*5 citations*
52. **[Accelerating Simulation of Quantum Circuits under Noise via Computational Reuse ↗](https://doi.org/10.1145/3695053.3730992)**Meng Wang, Swamit Tannu, Prashant J. Nair*5 citations*
53. **[Avalanche: Optimizing Cache Utilization via Matrix Reordering for Sparse Matrix Multiplication Accelerator ↗](https://doi.org/10.1145/3695053.3730990)**Gwangeun Byeon, Seongwook Kim, Hyungjin Kim et al.*5 citations*
54. **[Hermes: Algorithm-System Co-design for Efficient Retrieval-Augmented Generation At-Scale ↗](https://doi.org/10.1145/3695053.3731076)**Michael Shen, Muhammad Umar, Kiwan Maeng et al.*5 citations*
55. **[Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution ↗](https://doi.org/10.1145/3695053.3731109)**Chang Eun Song, Priyansh Bhatnagar, Zihan Xia et al.*5 citations*
56. **[Rethinking Prefetching for Intermittent Computing ↗](https://doi.org/10.1145/3695053.3731038)**Gan Fang, Jianping Zeng, Aditya Gupta et al.*5 citations*
57. **[ANVIL: An In-Storage Accelerator for Name–Value Data Stores ↗](https://doi.org/10.1145/3695053.3731000)**Ryan Wong, Nikita Kim, Aniket Das et al.*4 citations*
58. **[Adaptive CHERI Compartmentalization for Heterogeneous Accelerators ↗](https://doi.org/10.1145/3695053.3731062)**Jianyi Cheng, A. Theodore Markettos, Alexandre Joannou et al.*4 citations*
59. **[Avant-Garde: Empowering GPUs with Scaled Numeric Formats ↗](https://doi.org/10.1145/3695053.3731100)**Minseong Gil, Dongho Ha, Simla Burcu Harma et al.*4 citations*
60. **[BingoGCN: Towards Scalable and Efficient GNN Acceleration with Fine-Grained Partitioning and SLT ↗](https://doi.org/10.1145/3695053.3731115)**Jiale Yan, Hiroaki Ito, Yuta Nagahara et al.*4 citations*
61. **[Bishop: Sparsified Bundling Spiking Transformers on Heterogeneous Cores with Error-constrained Pruning ↗](https://doi.org/10.1145/3695053.3731063)**Boxun Xu, Yuxuan Yin, Vikram Iyer et al.*4 citations*
62. **[Dynamic Load Balancer in Intel Xeon Scalable Processor: Performance Analyses, Enhancements, and Guidelines ↗](https://doi.org/10.1145/3695053.3731026)**Jiaqi Lou, Srikar Vanavasam, Yifan Yuan et al.*4 citations*
63. **[FATE: Boosting the Performance of Hyper-Dimensional Computing Intelligence with Flexible Numerical DAta TypE ↗](https://doi.org/10.1145/3695053.3731031)**Haoming Li, Fangxin Liu, Yichi Chen et al.*4 citations*
64. **[Folded Banks: 3D-Stacked HBM Design for Fine-Grained Random-Access Bandwidth ↗](https://doi.org/10.1145/3695053.3731111)**Vignesh Adhinarayanan, Bradford M. Beckmann, Wantong Li et al.*4 citations*
65. **[HardHarvest: Hardware-Supported Core Harvesting for Microservices ↗](https://doi.org/10.1145/3695053.3731071)**Jovan Stojkovic, Chunao Liu, Muhammad Shahbaz et al.*4 citations*
66. **[Hardware-aware Calibration Protocol for Quantum Computers ↗](https://doi.org/10.1145/3695053.3731036)**Yuchen Zhu, Jinglei Cheng, Boxi Li et al.*4 citations*
67. **[Precise exceptions in relaxed architectures ↗](https://doi.org/10.1145/3695053.3731102)**Ben Simner, Alasdair Armstrong, Thomas Bauereiß et al.*4 citations*
68. **[Profile-Guided Temporal Prefetching ↗](https://doi.org/10.1145/3695053.3731070)**Mengming Li, Qijun Zhang, Yu-Ang Gao et al.*4 citations*
69. **[SwitchQNet: Optimizing Distributed Quantum Computing for Quantum Data Centers with Switch Networks ↗](https://doi.org/10.1145/3695053.3731046)**Hezi Zhang, Yiran Xu, Haotian Hu et al.*4 citations*
70. **[Synchronization for Fault-Tolerant Quantum Computers ↗](https://doi.org/10.1145/3695053.3730991)**Satvik Maurya, Swamit Tannu*4 citations*
71. **[A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices ↗](https://doi.org/10.1145/3695053.3731114)**Haneul Park, Jiaqi Lou, Sangjin Lee et al.*3 citations*
72. **[ATiM: Autotuning Tensor Programs for Processing-in-DRAM ↗](https://doi.org/10.1145/3695053.3731096)**Yongwon Shin, Dookyung Kang, Hyojin Sung*3 citations*
73. **[CORD: Low-Latency, Bandwidth-Efficient and Scalable Release Consistency via Directory Ordering ↗](https://doi.org/10.1145/3695053.3731074)**Yanpeng Yu, Nicolai Oswald, Anurag Khandelwal*3 citations*
74. **[Constant-Rate Entanglement Distillation for Fast Quantum Interconnects ↗](https://doi.org/10.1145/3695053.3731069)**Christopher A. Pattison, Gefen Baranes, J. Pablo Bonilla Ataides et al.*3 citations*
75. **[DS-TPU: Dynamical System for on-Device Lifelong Graph Learning with Nonlinear Node Interaction ↗](https://doi.org/10.1145/3695053.3731091)**Chunshu Wu, Ruibing Song, Chuan Liu et al.*3 citations*
76. **[DiTile-DGNN: An Efficient Accelerator for Distributed Dynamic Graph Neural Network Inference ↗](https://doi.org/10.1145/3695053.3731017)**Jiaqi Yang, Hao Zheng, Ahmed Louri*3 citations*
77. **[Evaluating Ruche Networks: Physically Scalable, Cost-Effective, Bandwidth-Flexible NoCs ↗](https://doi.org/10.1145/3695053.3731010)**Dai Cheol Jung, Michael Bedford Taylor*3 citations*
78. **[FlexNeRFer: A Multi-Dataflow, Adaptive Sparsity-Aware Accelerator for On-Device NeRF Rendering ↗](https://doi.org/10.1145/3695053.3731107)**Seock-Hwan Noh, Banseok Shin, Jeik Choi et al.*3 citations*
79. **[GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs ↗](https://doi.org/10.1145/3695053.3731060)**Fabian Wildgrube, Pete Ehrett, Paul Trojahn et al.*3 citations*
80. **[LightML: A Photonic Accelerator for Efficient General Purpose Machine Learning ↗](https://doi.org/10.1145/3695053.3731053)**Liang Liu, Sadra Rahimi Kari, Xin Xin et al.*3 citations*
81. **[MagiCache: A Virtual In-Cache Computing Engine ↗](https://doi.org/10.1145/3695053.3731113)**Renhao Fan, Yikai Cui, Weike Li et al.*3 citations*
82. **[MeshSlice: Efficient 2D Tensor Parallelism for Distributed DNN Training ↗](https://doi.org/10.1145/3695053.3731077)**Hyoungwook Nam, Gerasimos Gerogiannis, Josep Torrellas*3 citations*
83. **[Qtenon: Towards Low-Latency Architecture Integration for Accelerating Hybrid Quantum-Classical Computing ↗](https://doi.org/10.1145/3695053.3731087)**Chenning Tao, Liqiang Lu, Size Zheng et al.*3 citations*
84. **[Cassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs ↗](https://doi.org/10.1145/3695053.3731048)**Ali Hajiabadi, Trevor E. Carlson*2 citations*
85. **[CoopRT: Accelerating BVH Traversal for Ray Tracing via Cooperative Threads ↗](https://doi.org/10.1145/3695053.3731118)**Yavuz Selim Tozlu, Huiyang Zhou*2 citations*
86. **[DX100: Programmable Data Access Accelerator for Indirection ↗](https://doi.org/10.1145/3695053.3731015)**Alireza Khadem, Kamalavasan Kamalakkannan, Zhenyan Zhu et al.*2 citations*
87. **[Debunking the CUDA Myth Towards GPU-based AI Systems ↗](https://doi.org/10.1145/3695053.3731050)**Yunjae Lee, Juntaek Lim, Jehyeon Bang et al.*2 citations*
88. **[EOD: Enabling Low Latency GNN Inference via Near-Memory Concatenate Aggregation ↗](https://doi.org/10.1145/3695053.3731083)**Taehwan Kim, Yunki Han, Seohye Ha et al.*2 citations*
89. **[Enabling Ahead Prediction with Practical Energy Constraints ↗](https://doi.org/10.1145/3695053.3730998)**Lingzhe Chester Cai, Aniket Deshmukh, Yale N. Patt*2 citations*
90. **[Finesse: An Agile Design Framework for Pairing-based Cryptography via Software/Hardware Co-Design ↗](https://doi.org/10.1145/3695053.3731033)**Tianwei Pan, Tianao Dai, Jianlei Yang et al.*2 citations*
91. **[HPVM-HDC: A Heterogeneous Programming System for Accelerating Hyperdimensional Computing ↗](https://doi.org/10.1145/3695053.3731095)**Russel Arbore, Xavier Routh, Abdul Rafae Noor et al.*2 citations*
92. **[HYTE: Flexible Tiling for Sparse Accelerators via Hybrid Static-Dynamic Approaches ↗](https://doi.org/10.1145/3695053.3731044)**Xintong Li, Zhouyi Li, Mingyu Gao*2 citations*
93. **[HiPER: Hierarchically-Composed Processing for Efficient Robot Learning-Based Control ↗](https://doi.org/10.1145/3695053.3731097)**Justin Ting, Moonchurl Kim, Junkang Zhu et al.*2 citations*
94. **[MD-pipe: A Strong Scaling Enhanced Pipeline Architecture for Ab Initio Accuracy Molecular Dynamics ↗](https://doi.org/10.1145/3695053.3731052)**Ning Kang, Guojun Yuan, Zihan Yan et al.*2 citations*
95. **[Magellan: A High-Performance Loop-Guided Prefetcher for Indirect Memory Access ↗](https://doi.org/10.1145/3695053.3731054)**Gelin Fu, Tian Xia, Mingzhuo Yin et al.*2 citations*
96. **[NMP-PaK: Near-Memory Processing Acceleration of Scalable De Novo Genome Assembly ↗](https://doi.org/10.1145/3695053.3731056)**Heewoo Kim, Sanjay Sri Vallabh Singapuram, Haojie Ye et al.*2 citations*
97. **[Neoscope: How Resilient Is My SoC to Workload Churn? ↗](https://doi.org/10.1145/3695053.3731014)**Joseph Rogers, Lieven Eeckhout, Taha Soliman et al.*2 citations*
98. **[NetCrafter: Tailoring Network Traffic for Non-Uniform Bandwidth Multi-GPU Systems ↗](https://doi.org/10.1145/3695053.3731040)**Amel Fatima, Yang Yang, Yifan Sun et al.*2 citations*
99. **[RAP: Reconfigurable Automata Processor ↗](https://doi.org/10.1145/3695053.3731106)**Ziyuan Wen, Alexis Le Glaunec, Konstantinos Mamouras et al.*2 citations*
100. **[Reinforcement Learning-Guided Graph State Generation in Photonic Quantum Computers ↗](https://doi.org/10.1145/3695053.3731085)**Yingheng Li, Yue Dai, Aditya Pawar et al.*2 citations*

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