---
title: "Proceedings - International Symposium on Computer"
description: "All 135 papers of Proceedings - International Symposium on Computer Architecture/Proceedings 2025 · page 2 of 2, the most cited first…"
canonical: "https://research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/page/2/"
---
[Elamur Research](https://md.research.elamur.ai/free/en/) · [this page in HTML](https://research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/page/2/)

[home](https://md.research.elamur.ai/free/en/) / [venues](https://md.research.elamur.ai/free/en/venues/) / [Proceedings - International Symposium…](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/) / [2025](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/) / [papers](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/) / page 2

# Proceedings - International Symposium on Computer Architecture/Proceedings 2025: all accepted papers

135 papers · page 2 of 2 · the most cited first · [← Proceedings - International Symposium on Computer Architecture/Proceedings 2025](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/)

[← prev](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/) [1](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/) **2**

101. **[S-SYNC: Shuttle and Swap Co-Optimization in Quantum Charge-Coupled Devices ↗](https://doi.org/10.1145/3695053.3731084)**Chenghong Zhu, Xian Guo Wu, Jingbo Wang et al.*2 citations*
102. **[SEAL: A Single-Event Architecture for In-Sensor Visual Localization ↗](https://doi.org/10.1145/3695053.3731034)**Ryan Hou, Thomas Twomey, Vasileios Milionis et al.*2 citations*
103. **[SWIPER: Minimizing Fault-Tolerant Quantum Program Latency via Speculative Window Decoding ↗](https://doi.org/10.1145/3695053.3731022)**Joshua Viszlai, Jason D. Chadwick, Sarang Joshi et al.*2 citations*
104. **[Single-Address-Space FaaS with Jord ↗](https://doi.org/10.1145/3695053.3731108)**Yuanlong Li, Atri Bhattacharyya, Madhur Kumar et al.*2 citations*
105. **[TRACI: Network Acceleration of Input-Dynamic Communication for Large-Scale Deep Learning Recommendation Model ↗](https://doi.org/10.1145/3695053.3731105)**Guyue Huang, Hao Li, Le Qin et al.*2 citations*
106. **[Topology-Aware Virtualization over Inter-Core Connected Neural Processing Units ↗](https://doi.org/10.1145/3695053.3731002)**Dahu Feng, Erhu Feng, Dong Du et al.*2 citations*
107. **[TrioSim: A Lightweight Simulator for Large-Scale DNN Workloads on Multi-GPU Systems ↗](https://doi.org/10.1145/3695053.3731082)**Ying Li, Yuhui Bao, Gongyu Wang et al.*2 citations*
108. **[Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors ↗](https://doi.org/10.1145/3695053.3731066)**Sunho Lee, Seonjin Na, Jeongwon Choi et al.*2 citations*
109. **[XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting ↗](https://doi.org/10.1145/3695053.3731028)**Peng Li, Wenbo Wu, Shushu Yi et al.*2 citations*
110. **[AIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM ↗](https://doi.org/10.1145/3695053.3730987)**Yuanpeng Zhang, Xing Hu, Xi Chen et al.*1 citation*
111. **[AQB8: Energy-Efficient Ray Tracing Accelerator through Multi-Level Quantization ↗](https://doi.org/10.1145/3695053.3731104)**Yen-Chieh Huang, Chen-Pin Yang, Tsung Tai Yeh*1 citation*
112. **[ARTERY: Fast Quantum Feedback using Branch Prediction ↗](https://doi.org/10.1145/3695053.3731086)**Wuwei Tian, Liqiang Lu, Siwei Tan et al.*1 citation*
113. **[Assassyn: A Unified Abstraction for Architectural Simulation and Implementation ↗](https://doi.org/10.1145/3695053.3731004)**Jian Weng, Boyang Han, Derui Gao et al.*1 citation*
114. **[CaliQEC: In-situ Qubit Calibration for Surface Code Quantum Error Correction ↗](https://doi.org/10.1145/3695053.3731042)**Xiang Fang, Keyi Yin, Yuchen Zhu et al.*1 citation*
115. **[Cambricon-SR: An Accelerator for Neural Scene Representation with Sparse Encoding Table ↗](https://doi.org/10.1145/3695053.3731018)**Tianbo Liu, Xinkai Song, Zhifei Yue et al.*1 citation*
116. **[Chip Architectures Under Advanced Computing Sanctions ↗](https://doi.org/10.1145/3695053.3731012)**August Ning, David Wentzlaff*1 citation*
117. **[Concorde: Fast and Accurate CPU Performance Modeling with Compositional Analytical-ML Fusion ↗](https://doi.org/10.1145/3695053.3731037)**Arash Nasr-Esfahany, Mohammad Alizadeh, Victor Lee et al.*1 citation*
118. **[GCStack+GCScaler: Fast and Accurate GPU Performance Analyses Using Fine-Grained Stall Cycle Accounting and Interval Analysis ↗](https://doi.org/10.1145/3695053.3731068)**Hanna Cha, Sungchul Lee, Jounghoo Lee et al.*1 citation*
119. **[Garibaldi: A Pairwise Instruction-Data Management for Enhancing Shared Last-Level Cache Performance in Server Workloads ↗](https://doi.org/10.1145/3695053.3731029)**Jaewon Kwon, Yongju Lee, Jiwan Kim et al.*1 citation*
120. **[Genesis: A Compiler for Hamiltonian Simulation on Hybrid CV-DV Quantum Computers ↗](https://doi.org/10.1145/3695053.3731065)**Zihan Chen, Jiakang Li, Minghao Guo et al.*1 citation*
121. **[Leveraging control-flow similarity to reduce branch predictor cold effects in microservices ↗](https://doi.org/10.1145/3695053.3731059)**Haris I. Volos, Stylianos Vassiliou, Georgia Antoniou et al.*1 citation*
122. **[LightNobel: Improving Sequence Length Limitation in Protein Structure Prediction Model via Adaptive Activation Quantization ↗](https://doi.org/10.1145/3695053.3731006)**Seunghee Han, Soongyu Choi, Joo-Young Kim*1 citation*
123. **[NUPEA: Optimizing Critical Loads on Spatial Dataflow Architectures via Non-Uniform Processing-Element Access ↗](https://doi.org/10.1145/3695053.3731061)**Souradip Ghosh, Graham Gobieski, Keyi Zhang et al.*1 citation*
124. **[QR-Map: A Map-Based Approach to Quantum Circuit Abstraction for Qubit Reuse Optimization ↗](https://doi.org/10.1145/3695053.3731020)**H J Kim, Enhyeok Jang, Seungwoo Choi et al.*1 citation*
125. **[SpecASan: Mitigating Transient Execution Attacks Using Speculative Address Sanitization ↗](https://doi.org/10.1145/3695053.3731119)**Saber Ganjisaffar, Esmaeil Mohammadian Koruyeh, Jason Zellmer et al.*1 citation*
126. **[The Sparsity-Aware LazyGPU Architecture ↗](https://doi.org/10.1145/3695053.3731009)**Changxi Liu, Miao Yu, Yifan Sun et al.*1 citation*
127. **[The XOR Cache: A Catalyst for Compression ↗](https://doi.org/10.1145/3695053.3730995)**Zhewen Pan, Joshua San Miguel*1 citation*
128. **[UGPU: Dynamically Constructing Unbalanced GPUs for Enhanced Resource Efficiency ↗](https://doi.org/10.1145/3695053.3731103)**Xia Zhao, Guangda Zhang, Lu Wang et al.*1 citation*
129. **[Caravan: A Hardware/Software Co-Design for Efficient SIMD Neighbor Search on Point Clouds ↗](https://doi.org/10.1145/3695053.3731075)**Pedro Henrique Exenberger Becker, Franyell Silfa, Jose Maria Arnau et al.
130. **[IDEA-GP: Instruction-Driven Architecture with Efficient Online Workload Allocation for Geometric Perception ↗](https://doi.org/10.1145/3695053.3731080)**Suquan Zhang, Yu Hu, Yunfei Xiang et al.
131. **[InfiniMind: A Learning-Optimized Large-Scale Brain-Computer Interface ↗](https://doi.org/10.1145/3695053.3731067)**Yeongwoo Jang, Daye Jung, Seunghyun Song et al.
132. **[Nyx: Virtualizing dataflow execution on shared FPGA platforms ↗](https://doi.org/10.1145/3695053.3731094)**Panagiotis Miliadis, Dimitris Theodoropoulos, Nectarios Koziris et al.
133. **[QPlacer: Frequency-Aware Component Placement for Superconducting Quantum Computers ↗](https://doi.org/10.1145/3695053.3730994)**Junyao Zhang, Hanrui Wang, Qi Ding et al.
134. **[Single Spike Artificial Neural Networks ↗](https://doi.org/10.1145/3695053.3731027)**Rhys Gretsch, Michael J. Beyeler, Jeremy Lau et al.
135. **[Telos: A Dataflow Accelerator for Sparse Triangular Solver of Partial Differential Equations ↗](https://doi.org/10.1145/3695053.3731078)**Xiaochen Hao, Hao Luo, Chu Wang et al.

[← prev](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/) [1](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/papers/) **2**

- [← back to](https://md.research.elamur.ai/free/en/venues/proceedings-international-symposium-on-computer-architecture-proceedings/2025/) — Proceedings - International Symposium on Computer Architecture/Proceedings 2025
